1. Field of the Invention
The invention relates to a method of producing integrated MOS field effect transistors and somewhat more particularly to an improved method of producing complementary MOS field effect transistor circuits (CMOS-FET's).
2. Prior Art
German Offenlegungsschrift 30 27 954 describes a method for producing integrated MOS field effect transistors wherein a metal layer structure consisting of metal silicides having a high melting temperature, such as silicides of Mo, W, Ta or Ti, are utilized as an additional interconnect, with the metal silicides being applied after fabrication of the polysilicon level, the generation of active MOS regions, the application of the insulating oxide and the opening of the contact holes and in which a phosporous glass layer is utilized as an intermediate oxide between the metal silicide level and the metal interconnect. This technique is adequate for the manufacture of integrated MOS field effect transistors. However, with a transfer of these process steps into the manufacture of complementary MOS field effect transistor circuits (CMOS circuits) difficulties arise because a rounding of the rims and edges in the contact hole areas can only be performed before the etching of the contact holes. Otherwise, the p.sup.+ regions would be uncovered and a depletion of doping materials would occur in these regions due to the applied high temperature. Further, when opening the contact holes (aluminum to n.sup.+ regions, aluminum to p.sup.+ regions and aluminum to polysilicon regions) in integrated CMOS and NMOS circuits in which an additional interconnect is utilized, a problem occurs in that etching must be carried out in oxide layers of different thicknesses, resulting in a substantial undercutting of the contact holes.